Virtual memory, which is an imaginary memory area supported by the operating system of a computer, increases the set of addresses a program can use. Usually, this set of addresses is referred to as the address space and is divided into units or pages. While virtual addresses are used to access virtual memory, physical addresses are used to locate data stored in physical locations or physical memory corresponding to the virtual addresses. Contemporary computers commonly use translation look-aside buffers or tables to cache virtual to physical page address translations. As program applications grow in size and their data requirements increase, the number of pages required by the applications and hence the number of translations that need to be cached in the translation look-aside buffer increases. Unfortunately, the translation look-aside buffer is often the cycle-time limiter in processors and increasing its size exacerbates the problem.
To limit the number of entries needed in a translation look-aside buffer and thereby reducing its cycle time, designers usually increase the size of memory pages, which decreases the number of entries the translation look-aside buffer needs to contain. This is because a given amount of memory can be represented by fewer pages. However, this approach also increases the time needed for moving a memory page and the number of page faults, which occur when a memory page is accessed but the page is not in memory. In addition, larger pages in memory, especially those of gigabyte sizes, result in more chance that large fractions of the page are not used by the portion of the applications currently executing. This leads to inefficient use of memory.
Some approaches have balanced the disparate needs of large page sizes, small number of translation look-aside buffer entries, and penalties due to moving or copying large pages. However, in these approaches, translation look-aside buffers are still cycle time limiters. “Super pages” have been investigated to combine multiple smaller pages to create one larger page, which combines several translation look-aside buffer entries into one and allows each individual page creating the super page to be stored in noncontiguous memory locations. Nevertheless, all pages are usually stored in system memory or swap memory, which refers to storage areas for data that is not in system memory. Normally, the operating system, during execution of a program, keeps as much data in the system memory as possible, and leaves the rest of the data somewhere else, e.g., in a hard disc. When the system needs the data, it swaps some of the data in system memory with some of the data in the disc.
Current approaches using the operating system to manage memory result in very complex systems and inefficient management of memory. The operating system has to deal with the discussed-above problems in trade-offs between page size and translation look-aside buffer misses. The operating system usually does not know the latency and/or bottleneck at the hardware level several layers away from the operating system, and it is yet responsible for managing the memory, especially memory swapping, which occurs at the hardware level. In many situations, memory swapping requires many complicated steps, but the processor has to wait for all the steps, and thus the swap, to complete before the processor can access the data in swap memory. The operating system commonly treats physical memory as a black box, and therefore in many situations cannot make informed decisions in managing the memory, including page placement. This also increases the complexity of the operating system. Based on the foregoing, it is clearly desirable that mechanisms be provided to solve the above deficiencies and related problems.